1. Field of the Invention
The present invention relates to a liquid crystal display device and, for example, to one of a pair of substrates between which a liquid crystal layer is interposed, i.e., a so-called TFT substrate on which thin film transistors (hereinafter referred to as TFTs) are formed, as well as to a fabrication method for such a TFT substrate.
2. Description of the Related Art
In the case of a related art liquid crystal display device, as described in Japanese Patent Laid-Open No. 202153/1994, its TFT substrate is fabricated by forming openings in the gate insulating film and the protective film laminated on the TFT substrate, through one photo-process (a process which includes the photolithography of forming a photomask on a work and partly removing the photomask according to a processing pattern), and carrying out patterning through a total of five photo-processes. In the TFT substrate obtained by this fabrication method, a charge holding capacitor for the TFT provided in each pixel includes a metal electrode which is formed in the same process as and of the same material as gate wiring lines and serves as a lower electrode, a metal electrode which is formed in the same process as and of the same material as signal lines for the TFT and serves as an upper electrode, and a dielectric which is disposed between the lower and upper electrodes. As the dielectric, a gate insulating film, a nondoped semiconductor (an i-type semiconductor; also called an intrinsic semiconductor) and a semiconductor containing an impurity (also called an n+-type semiconductor according to the conduction type of the impurity) are constructed in the form of a laminated film. The upper electrode of the charge holding capacitor is connected to a pixel electrode made of a transparent conductive film via a through-hole formed in the protective film of the TFT.
In addition, as described in Japanese Patent Laid-Open No. 232409/1998, there is a fabrication method which forms through five photo-processes a TFT substrate provided with thin film transistors each of which is of the reversed staggered type (the type in which a semiconductor layer serving as a channel is disposed on the gate electrode of a transistor) and has a channel etch structure (a structure in which a portion serving as the channel of the semiconductor layer is partly thinned by etching or the like).
In addition, there is an art which fabricates a TFT substrate for an In-Plane-Switching (hereinafter, IPS) mode of liquid crystal display device through four photo-processes by using the above-described fabrication method.
In another related art liquid crystal display device, as described in Japanese Patent Laid-Open No. 90404/1997, the upper electrode of each charge-holding capacitor is made of a metal electrode formed in the same process as and of the same material as its gate wiring lines, and the lower electrode of the charge-holding capacitor is made of a transparent electrode deposited in the same process as a metal film for signal lines of each TFT. The dielectric of the charge holding capacitor is made of a gate insulating film, and an opening (a through-hole) is formed in a protective film made of an organic material formed on the upper electrode of the charge-holding capacitor, and the upper electrode and the pixel electrode are connected to each other via the opening.
According to the arts disclosed in Japanese Patent Laid-Open No. 202153/1994 and Japanese Patent Laid-Open No. 232409/1998, at least five times of patterning (five photo-processes) are needed during the processing of the TFT glass substrate of the liquid crystal display device. Moreover, in Japanese Patent Laid-Open No. 232409/1998, although the TFT glass substrate of a lateral electric field type, i.e., the IPS display mode, of liquid crystal display device is formed through four photo-processes, the terminals of its gate and drain wiring lines are not coated with a transparent conductive film such as Indium-Tin-Oxide (hereinafter, ITO), so that the terminals suffer the problem of electrical corrosion due to humidity. In addition, since comb-teeth like pixel (source) electrodes are disposed close to the gate wiring lines, there is the problem that parasitic capacitance becomes large.
The dielectric of the charge holding capacitor described in Japanese Patent Laid-Open No. 202153/1994 has the laminated structure in which the i-type semiconductor and the n+-type semiconductor are laminated on the gate insulating film. Therefore, during charging for driving the TFT type liquid crystal display device, the potential of the lower electrode of the charge holding capacitor becomes higher than that of the upper electrode of the charge holding capacitor and electrons are injected into the i-type semiconductor film from the lower electrode, so that the capacitance value is determined by the thickness of the gate insulating film. During a charge-holding period in such driving, electrons are emitted from the i-type semiconductor and the capacitance value fluctuates and lowers to a capacitance value which is a value for the thickness of the i-type semiconductor, resulting in the problem that image retention occurs in the liquid crystal.
The TFT liquid crystal display device described in Japanese Patent Laid-Open No. 90404/1997 has the protective film made of the organic material, and the drain wiring lines are used as light-shielding electrodes, and pixel electrodes are disposed to overlap the drain wiring lines above the organic protective film of low dielectric constant, thereby improving the aperture ratio. However, patterning processing needs at least five photo-processes.
An object of the invention is to simplify a fabrication process for a TFT substrate compared to the above-described fabrication methods for the related art liquid crystal display devices. Another object of the invention is to improve the display contrast of a liquid crystal display device by forming a wiring structure which has high accuracy and can prevent drain wiring lines from being easily disconnected, by employing the simplified fabrication method. A further object of the invention is to increase the capacitance value per unit area of a charge holding capacitor provided in each pixel of a liquid crystal display device and increase the aperture ratio of the pixel, by using the simplified fabrication method.
Another object of the invention is to use a simple fabrication method which decreases the capacitance difference in charge-holding capacitance between on-switching and off-switching during the driving of a liquid crystal display device and so reduce image retention. A further object of the invention is to reduce the parasitic capacitance between gates and pixel (source) electrodes in IPS display mode.
To achieve the above objects, the invention provides a liquid crystal display device having a novel wiring structure.
One example of liquid crystal display devices according to the present invention comprises:
a first insulating substrate and a second substrate being disposed so that respective main surfaces thereof are opposite to one another;
a liquid crystal layer being interposed between the first and second insulating substrates;
gate wiring lines being formed on the first insulating substrate and transmitting scanning signals;
a gate insulating film being composed of the first insulating substrate and the gate wiring lines;
drain wiring lines being composed of metal films formed on the gate insulating film and transmitting video signals;
semiconductor layers being formed on the gate insulating film and at least under the drain wiring lines;
thin film transistor sections, each of which has
(1) a semiconductor channel layer composed of a part of the semiconductor layer located at least over a part of the gate wiring layer,
(2) a drain electrode composed of a part of the drain wiring line located on the semiconductor channel layer and a semiconductor contacting layer formed of a part of the semiconductor layer being contacted with the part of the drain wiring lines,
(3) a source electrode composed of another metal film formed on the semiconductor channel layer to be spaced from and opposite to the drain electrode and another semiconductor contacting layer formed of another part of the semiconductor layer being contacted with a lower surface of the another metal film, and
(4) a protective film covering the drain wiring lines, the source electrode, and the drain electrode; and
pixel electrode sections, each of which has a pixel electrode being contacted with the source electrodes, wherein
(a) a planar pattern of each of the semiconductor layers is broader than those of the metal layers of the drain wiring layer, the source electrodes, and the drain electrodes formed thereon, and
(b) a planar pattern of each of the semiconductor layers other than the semiconductor contacting layers formed therein is broader than those of the semiconductor contacting layers. The aforementioned semiconductor channel layer and the aforementioned semiconductor contacting layer often designate specific parts of the semiconductor layer. Namely, neither the semiconductor channel layer nor the semiconductor contacting layer should be limited to be interpreted as layers other than the semiconductor layer, and thus the semiconductor layer is allowed to have a stacked structure of the semiconductor channel layer and the semiconductor contacting layer being formed therein between the gate insulating film and the drain electrode, for instance. Preferably, the semiconductor channel layer should be formed of an intrinsic semiconductor layer (without impurities doped intentionally therein) and the semiconductor contacting layer should be formed of an impurity (e.g. n-type)-doped semiconductor layer. These definitions of the semiconductor channel layer and the semiconductor contacting layer are also applied to following examples and embodiments.
Another example of liquid crystal display devices according to the present invention comprises:
a first insulating substrate and a second insulating substrate disposed to be opposite to the first insulating substrate;
a liquid crystal layer being interposed between the first insulating substrate and the second insulating substrate;
a plurality of gate wiring lines, each of which is formed on the first insulating substrate and transmits a scanning signal;
a gate insulating film being formed on the first insulating substrate and the plurality of gate wiring lines;
a plurality of drain wiring lines, each of which is formed on the gate insulating film and transmits a video signal;
a plurality of semiconductor layers being formed on the gate insulating film and at least under one of the plurality of drain wiring lines;
thin film transistor sections, each of which has
(1) a semiconductor channel layer formed of a part of the one of the plurality of semiconductor layers extended at least over a part of one of the plurality of gate wiring lines,
(2) a drain electrode formed of a part of the one of the plurality of drain wiring lines situated on the semiconductor channel layer,
(3) a source electrode formed on the semiconductor channel layer at an opposite side of the part of the one of the plurality of gate wiring lines to the drain electrode to be spaced from the drain electrode;
a protective film covering the plurality of drain wiring lines, the source electrodes, and the drain electrodes;
a plurality of pixel electrodes, each of which is contacted with the source electrode of one of the thin film transistor sections; and
charges-holding capacitance sections, each of which has an upper electrode connected to one of the pixel electrode and a lower electrodes formed of the gate wiring line or a material thereof (metallic material, alloy material, or the like),
wherein,
(c) a dielectric film being interposed between the lower electrode and the upper electrode of each of the holding capacitance sections has a stacked layer structure formed of the gate insulating film and the semiconductor layer, and
(d) each of the pixel electrodes is contacted with one of the semiconductor layers through a contact hole provided by perforating the protective film.
Moreover, an example of liquid crystal display device according to the present invention other than the aforementioned two examples thereof comprising:
a liquid crystal layer being interposed between a first insulating substrate and a second insulating substrate provided to be opposite to the first insulating substrate;
gate wiring lines formed on the first insulating substrate and transmitting scanning signals;
a gate insulating film formed on the first insulating substrate and the gate wiring lines;
drain wiring lines being composed of metal layers formed on the gate insulating film and transmitting video signals;
semiconductor layers, each of which is formed on the gate insulating film and is provided at least under one of the drain wiring lines;
thin film transistor sections, each of which has
(1) a semiconductor channel layer formed of a part of one of the semiconductor layers located over a part of one of the gate wiring lines,
(2) a drain electrode formed of a part of the drain wiring lines located on the semiconductor channel layer,
(3) a source electrode being formed on the semiconductor channel layer to be opposite to and spaced from the drain electrode;
a protective film being formed over at least one of the drain wiring lines, the source electrode, and the drain electrode; and
pixel sections, each of which has at least one pixel electrode being connected to the source electrode and at least one of common electrode being spaced from the at least one pixel electrode in a plane along at least one of main surfaces of the first and second insulating substrates, wherein
(e) semiconductor contacting layers are formed in each of the semiconductor layers along respective interfaces thereof contacting metal layers of the one of the drain wiring lines, the source electrode, and the drain electrode, and
(f) the at least one pixel electrode is formed as three layered structure having the semiconductor layer, the semiconductor contacting layer, and a metal layer of either the drain wiring line or the source electrode being stacked in this order on the gate insulating film. This example also enables to generate an electric field having a component thereof substantially parallel to at least one of the main surface of the first and second insulating substrates in the liquid crystal layer by applying a voltage between the pixel electrode and the common electrode in accordance with the aforementioned structure of the pixel section. The liquid crystal display device displaying an image by controlling optical transmissivity of the liquid crystal layer in such a manner is called as the In-Plane-Switching (IPS) type.
In any of the above-described examples, the drain wiring lines, the source electrodes and the drain electrodes are in many cases formed of a metal, an alloy or a similar material. Three films, i.e., a metal film which constitutes the drain wiring lines, the source electrodes and the drain electrodes, a film which constitutes an n+-type semiconductor underlying the metal film, and a film which constitutes an i-type semiconductor underlying the n+-type semiconductor, are integrated into a pattern for the drain wiring lines. The metal film is made wider in line width than the n+-type semiconductor, and the i-type semiconductor is made wider in line width than the n+-type semiconductor, whereby the resultant steps are arranged in a staircase-like shape on the gate insulating film.
By distributing the line width of each of the films in this manner, the tensile stress of the metal film is canceled by the compressive stress of the semiconductor films, thereby preventing disconnection of the drain wiring lines at steps produced on the main surface of the substrate by the gate wiring lines. Moreover, the steps of the wiring lines are formed into a staircase-like shape, thereby dispersing and moderating the difference in height to maintain the coverage of the overlying protective film (the coating ratio of the protective film). Thus, shades due to rubbing during a liquid crystal alignment process are reduced and contrast is improved.
In addition, the liquid crystal display device according to the invention adopts a new charge-holding capacitance structure. The lower electrode of each charge holding capacitor is made of a metal electrode formed in the same process as and of the same material as gate wiring lines, and the upper electrode of the charge holding capacitor is made of a transparent conductive film which is present on a protective film and covers the openings of the protective film, and a laminated film made of a gate insulating film and an i-type semiconductor film or only the gate insulating film is used as a dielectric. The i-type semiconductor or the gate insulating film is directly connected to the transparent conductive film.
In addition, the liquid crystal display device according to the invention can adopt another charge-holding capacitance structure. The upper electrode of each charge holding capacitor is made of a transparent conductive film disposed on a protective film and connected through an opening of the protective film to a metal electrode formed in the same process as and of the same material as gate wiring lines, and the lower electrode of the charge holding capacitor is made of a metal electrode formed in the same process as and of the same material as drain wiring lines, and a protective insulating film is used as a dielectric.
According to the liquid crystal display device according to the invention, a new structure is adopted for the pixel electrodes of the IPS type liquid crystal display device. Each pixel electrode is formed as a three-layer structure made of an n+-type semiconductor, an i-type semiconductor and a metal film over a gate insulating film, and the steps of the pixel electrode are formed in a staircase-like shape so as to widen the lower section thereof. Owing to this structure, the parasitic capacitance between gate wiring lines and source electrodes is reduced.
The increase in the capacitance value per unit area of the above-described charge holding capacitor according to the invention makes it possible to narrow the widths of the gate wiring lines, the charge holding capacitor wiring lines or the common electrode wiring lines of the IPS liquid crystal display device, thereby improving the aperture ratio of each pixel of the liquid crystal display device.
To achieve the above objects, there is provided a new fabrication method which forms a TFT substrate through four photo-processes. The first is patterning gate wiring metal, the second is patterning a metal film for drain wiring lines and a semiconductor film, the third is patterning of openings in a protective film overlying the drain wiring lines, and the fourth is patterning pixel electrode on the protective film or a transparent conductive film having a particular function.
In the above-described fabrication method, the semiconductor film can use amorphous silicon (hereinafter, a-Si). In this fabrication method, the exposure and development of a photoresist for patterning the metal films of the drain wiring lines and the source and drain electrodes of TFTs as well as n+-type a-Si semiconductors and i-type s-Si semiconductors are carried out through one process. After the completion of the one exposure and development process, the drain metal is divided into the area in which a photoresist is absent, the area in which a thick photoresist is present and the area in which a thin photoresist is present.
A photomask for realizing the photoresist having such two different thicknesses through one exposure and development process has a construction having two metal film areas having different optical transmissivities, or a construction made of an aggregate area which has one nontransparent (opaque) metal film area and another nontransparent metal film area having slits or holes of 1-4 xcexcm.
The substrate which has, in addition to the photoresist area having such two different thicknesses, the metal film having the area in which a photoresist is absent, the n+-type a-Si film underlying the area, the i-type a-Si film underlying the n+-type a-Si film and a SiN film underlying the i-type a-Si film is processed in the following sequence, and is separated into the drain wiring lines, the source and drain metals and the channel areas (i-type a-Si) of TFTs. The sequence includes removing the metal from the area having no photoresist by etching, selectively removing the n+-type a-Si film and the i-type a-Si film from the gate SiN film, removing the thin photoresist area by oxygen ashing with the thick photoresist area being left, again removing the metal film by etching, and removing the n+-type a-Si film having no metal film.
By using a photomask having three areas having different optical transmissivities, it is possible to process drain wiring lines, source electrodes and drain electrodes and s-Si films through one photo-process for exposure and development, whereby it is possible to simplify the entire process. In addition, the number of photo-processes per TFT substrate can be reduced to four.
Although the metal films of the drain wiring lines, the source electrodes and the drain electrodes are removed through two separate etching processes, it is possible to improve the processing accuracy of the drain wiring lines by performing dry etching as the first process and wet etching as the second process.
The metal film of the drain wiring lines is preferably a single film made of a metal containing Mo or a metal containing Ta, Ti or W, or a laminated film of these metals.
To realize another object of the invention, there is provided a new fabrication method for a charge holding capacitor. An i-type a-Si film formed as a dielectric for a charge holding capacitor and a protective film formed on the i-type a-Si film and made of SiN are removed by etching with an aqueous solution containing hydrofluoric acid and ammonium fluoride (a buffer solution of hydrofluoric acid), then the i-type a-Si film is selectively removed from a gate insulating film SiN by dry etching, and subsequently a transparent conductive film such as Indium-Tin-Oxide (hereinafter, ITO) is deposited to be a lid over openings of the protective film.
In the case where two films, i.e., a film made of SiN and a film made of an organic material, are used as the aforementioned protective film, it is possible to adopt another fabrication method for processing the SiN protective film and the organic-material protective film which overlie the i-type a-Si film of a charge-holding dielectric section. A photosensitive material is used as the organic material, and a pattern having openings with respect to the underlying film is formed by exposure and development, and this organic material itself is used as a mask pattern to remove the protective film SiN by etching with a buffer solution of hydrofluoric acid, and heat treatment which extends the organic material inwardly of the openings is performed at a treatment temperature of 150-200xc2x0 C. After that, a transparent conductive film such as ITO is deposited to be a lid over the openings of the protective film.
In the above-described fabrication method, the i-type a-Si film may also be removed by etching before or after the heat treatment of the organic material.
By using the fabrication method for the charge holding capacitor, it is possible to form the dielectric of the charge holding capacitor with a gate insulating film or a laminated structure of the gate insulating film and the i-type a-Si film, whereby the capacitance value per unit area is increased and hence the aperture ratio is increased. In addition, even if the i-type a-Si film is directly connected to ITO, the contact resistance is high, so that electrons are not injected and image retention does not occur.
These and other objects, features and advantages of the present invention will become more apparent from the following description when taken in conjunction with the accompanying drawings.